FPGA Design Implementation of AES and RSA for Information Security


Authors and Affiliations:
Swati Malik, Department of ECE, Maharaja Surajmal Institute of Technology, Delhi, India

Abstract:
With recent advancements in the field of semiconductor industry, information security turns out to be major concern especially for the applications related to cryptography. Rivest- Shamir Adleman(RSA) and Advanced Encryption Standard (AES) are the two popularly identified encryption schemes that guarantees  authenticity and confidentiality of the data over an insecure communication channel. This paper compares the performance of 64-bit RSA and AES algorithm using Verilog HDL. Experimental results shows that AES turns out to be stronger option in terms of processing speed, whereas in terms of security RSA proves to be highly Efficient and avoids usage of third party for key exchange. Result analysis reveals that AES stands out to be better option as it is affordable in terms of security and possess higher processing speed and low power consumption.

Keywords:
Advanced Encrytion Standard (AES), Rivest- Shamir Adleman (RSA), Cryptography, Verilog HDL, Cipher Key.

Cite This Article:
Swati Malik, "FPGA Design Implementation of AES and RSA for Information Security", International Journal of Electrical Electronics & Computer Science Engineering, Volume 6, Issue 6, pp. 01-04.